1. Field of the Invention
The present invention relates to a level shift circuit used in a semiconductor integrated circuit.
2. Description of the Related Art
Various level shift circuits are generally used in an electronic circuits. In a classic AC amplifier, DC cutoff capacitors are arranged between stages, and a DC bias is applied to each of the stages again. However, in a DC amplifier or a logic circuit, unlike in an AC amplifier, a DC component cannot be cut. For this reason, a level shift element or a cascode amplifier using forward voltage drop-of a diode, or a combination circuit thereof is used to shift a DC level (e.g., Donald L. Siring and Charles Birave, translated by Toyohiko Okabe, Koichi Usami, "Electronic Circuit for Transistor and IC, Analog part" pp. 322-327).
FIG. 1 shows a conventional level shift circuit used in an SCFL logic integrated circuit using a GaAs MESFET. This level shift circuit consists of a source follower MESFET J.sub.1, diodes D.sub.1 to D.sub.3 used as level shift elements, a current source MESFET J.sub.2, and a current supply resistor R.sub.B.
This conventional level shift circuit has insufficient high-frequency characteristics. The level shift circuit shifts only a DC level, and it has no AC gain. However, since the frequency characteristics of the level shift circuit are not good, as shown in FIG. 2, the level shift circuit attenuates a high-frequency signal to adversely affect the high-frequency characteristics of a whole circuit including circuits other than the level shift circuit.
As a method of improving the high-frequency characteristics of such a level shift circuit, the following method is known. That is, the sizes of the MESFETs J.sub.1 and J.sub.2 are increased, and a large current is caused to flow in the level shift circuit. However, when the large current flows in the level shift circuit, the power consumption of the integrated circuit chip is increased in accordance with the current value. This is against a demand for decreasing power consumption of an integrated circuit. In fact, in a conventional SCFL logic integrated circuit or an ECL logic integrated circuit, the half of the power of the chip is consumed by a level shift circuit (e.g., Yoshihara, Konno, Kitaura, Ishida, and Shimizu, "Design and Evaluation of 10-GHz 8-bit MUX/DEMUX-Input/Output Circuit", the Institute of Electronics and Information Communication Engineers of Japan, national conference proceedings, 1991, C-507, pp. 5-98).
As described above, in an integrated circuit having a conventional level shift circuit, high-frequency characteristics and low power consumption characteristics are traded off, and the relationship therebetween is desired to be improved.